Changelog

Continuous, dated development. Every release lists what shipped — no marketing spin.

1. v2.5May 2026in-progress
   • Validation suite (TSMC N7, GaN HEMT cross-checks)
   • Engineering Brief (4-page PDF) and /brief route
   • Methodology page with full equations, citations, reproducibility kit
   • Press kit, audience-specific landing pages, contact funnel
   • Cookie-free analytics beacon
2. v2.0May 2026shipped
   • Logic Gates module (NAND/NOR/INV with delay and energy)
   • Auto-Designer: AI-assisted topology synthesis
   • Chip Benchmark: comparison vs. Apple M4, NVIDIA B200, Cerebras WSE-3, InGaOx GAA, +6 others
   • BSIM-CMG / BSIM-IMG compact-model alignment
3. v1.5May 2026shipped
   • Visual Chip Design Studio (drag-place builder)
   • AI Copilot tab (design Q&A, parameter suggestions)
   • Test Lab with regression harness
   • Engineering Output panel for Transistor Sim (I-V family, SS/DIBL, g_m, R_on·A)
4. v1.0April 2026shipped
   • Initial release: Crystal Lab, Transistor Sim, Piezo Engine, EM Coupling, Scaling Laws, Research Library, Hybrid Designer
   • Material database (8 crystals) with citations
   • Simon's Law derivation and interactive plot