CRYSTALSIM

initializing lattice

Power, Heat, and the Real-World Limits

Lesson 6 of 6·12 min read·+50 XP
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Why your laptop fan exists

Every transistor switching event costs energy. Multiply by tens of billions of transistors switching billions of times per second and you get the chip's #1 design constraint: heat. Power and thermals are why your laptop has a fan, why phones throttle when they're hot, and why data centers spend more on cooling than on chips.

Key Concept
Dynamic Power
Power consumed each time a transistor switches — charging and discharging tiny capacitors. P_dyn = α · C · V² · f, where α is activity factor (fraction of transistors switching), C is total switching capacitance, V is supply voltage, f is clock frequency. Dominates active workloads.
Key Concept
Static Power
Power consumed continuously even when nothing is switching — current that 'leaks' through transistors that are nominally OFF. P_stat = V · I_leak. Used to be negligible; below 28 nm it became a major chunk of total power.
Key Concept
Power Density (W/cm²)
Watts dissipated per square centimeter of die. The metric the cooling system actually cares about. Modern CPUs run 80 – 200 W/cm² locally; above ~150 W/cm² silicon struggles to remove heat fast enough.
Key Concept
Thermal Design Power (TDP)
The maximum sustained power the cooling system is rated to remove. A 'TDP 65 W' chip will throttle its clock if real workloads exceed that. TDP is a thermal contract, not a peak-power number.
Key Concept
Heat Sink
A finned metal block (usually copper or aluminum) bonded to the chip to spread heat over a larger area for air or liquid cooling. Increases effective surface area by 100×+, but adds height and weight.
Interactive · Power & heat calculator
1.00 V
3.50 GHz
8.0 nF
0.50 A
Dynamic Power
4.2 W
C · V² · f
Static Power
0.5 W
V · I_leak
Total Power
4.7 W
dynamic + static
Heat Indicator
4.7 W
Throttle threshold: 150 W
Checkpoint · +5 XP
Halving the supply voltage roughly does what to dynamic power?

How could Crystal-EM help here?

- Lower V — piezoelectric gating amplifies a small electrical input via mechanical strain, so you can reach the same channel charge with a lower supply. V² scaling rewards every millivolt saved. - Sharper SS — wider band gaps (GaN, SiC) allow lower OFF-leakage for the same Vth, cutting static power. - Better thermal conductivity — diamond-like crystals shed heat 5–10× faster than silicon, raising the safe power-density ceiling.

Not every claim survives lab testing, but these are the levers — and the reason the thesis (Track 4) keeps coming back to power.

You've completed Track 3 — Electrical Engineering 101. You can read voltage, current, and resistance; explain how a MOSFET switches; interpret an I-V curve; assemble logic gates; trace the hierarchy from transistor to processor; and reason about the power and heat constraints that bound real-world performance. With Tracks 2 and 3 in hand, Track 4 (The Thesis) is now unlocked.

Lesson Summary
  • Total chip power = dynamic (switching) + static (leakage).
  • P_dynamic = α · C · V² · f. Voltage is squared — small V cuts have huge effects.
  • P_static = V · I_leak. As transistors shrink, leakage rises and now dominates idle power.
  • Heat is the #1 practical limit on performance — modern CPUs throttle when power density exceeds ~150 W/cm².
Test Your Knowledge · +50 XP
1
Dynamic power scales as:
2
Static power is caused by:
3
Which lever has the biggest effect on dynamic power?
4
Why is heat the #1 practical limit on chip performance?
5
Crystal-EM might reduce power because: